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1. general description 74hc2g66 and 74hct2g66 are high-speed si-gate cmos devices. they are dual single-pole single-throw analog switches . each switch has two input/output pins (ny and nz) and an active high enable input pin (ne). when pin ne is low, the analog switch is turned off. 2. features and benefits ? wide supply voltage range from 2.0 v to 10.0 v for 74hc2g66 ? very low on resistance: ? 41 (typ.) at v cc =4.5v ? 30 (typ.) at v cc =6.0v ? 21 (typ.) at v cc =9.0v ? high noise immunity ? low power dissipation ? 25 ma continuous switch current ? multiple package options ? esd protection: ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v ? specified from ? 40 cto+85 c and ? 40 cto+125 c 3. ordering information 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch rev. 8 ? 23 september 2010 product data sheet table 1. ordering information type number package temperature range name description version 74hc2g66dp ? 40 c to +125 c tssop8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505-2 74hct2g66dp 74hc2g66dc ? 40 c to +125 c vssop8 plastic very thin shri nk small outline package; 8 leads; body width 2.3 mm sot765-1 74hct2g66dc 74hc2g66gt ? 40 c to +125 c xson8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 1.95 0.5 mm sot833-1 74HCT2G66GT 74hc2g66gd ? 40 c to +125 c xson8u plastic extremely thin small outline package; no leads; 8 terminals; utlp based; body 3 2 0.5 mm sot996-2 74hct2g66gd
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 2 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch 4. marking 5. functional diagram table 2. marking codes type number marking 74hc2g66dp h66 74hct2g66dp t66 74hc2g66dc h66 74hct2g66dc t66 74hc2g66gt h66 74HCT2G66GT t66 74hc2g66gd h66 74hct2g66gd t66 fig 1. logic symbol fig 2. logic diagram for 1 switch 001aag49 7 1e 2z 1y 1z 2y 2e 001aaa54 1 t plh t phl v m v m v m v m ny or nz input nz or ny output gnd v i v oh v ol
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 3 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch 6. pinning information 6.1 pinning 6.2 pin description fig 3. pin configuration sot505-2 (tssop8) and sot765-1 (vssop8) fig 4. pin configuration sot833-1 (xson8) 74hc2g66 74hct2g66 1y v cc 1z 1e 2e 2z gnd 2y 001aai699 1 2 3 4 6 5 8 7 74hc2g66 74hct2g66 2z 1e v cc 2y 2e 1z 1y gnd 001aam49 8 36 27 18 45 transparent top view fig 5. pin configuration sot996-2 (xson8u) 001aal625 74hc2g66 74hct2g66 transparent top view 8 7 6 5 1 2 3 4 1y 1z 2e gnd v cc 1e 2z 2y table 3. pin description symbol pin description 1y, 2y 1, 5 independent input or output 1z, 2z 2, 6 independent input or output gnd 4 ground (0 v) 1e, 2e 7, 3 enable input (active high) v cc 8 supply voltage
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 4 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch 7. functional description [1] h = high voltage level; l = low voltage level. 8. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] for tssop8 packages: above 55 c the value of p tot derates linearly with 2.5 mw/k. for vssop8 packages: above 110 c the value of p tot derates linearly with 8.0 mw/k. for xson8 and xson8u packages: above 118 c the value of p tot derates linearly with 7.8 mw/k. table 4. function table [1] input ne switch loff hon table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage ? 0.5 +11.0 v i ik input clamping current v i < ? 0.5 v or v i >v cc + 0.5 v [1] - 20 ma i sk switch clamping current v i < ? 0.5 v or v i >v cc + 0.5 v [1] - 20 ma i sw switch current v sw > ? 0.5 v or v sw < v cc + 0.5 v - 20 ma i cc supply current - 30 ma i gnd ground current ? 30 - ma t stg storage temperature ? 65 +150 c p tot total power dissipation t amb = ? 40 c to +125 c per package [2] - 300 mw per switch [2] - 100 mw
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 5 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch 9. recommended operating conditions [1] to avoid drawing v cc current out of pin nz, when switch current flows in pin n y, the voltage drop across the bidirectional switch must not exceed 0.4 v. if the switch current flows into pin nz, no v cc current will flow out of terminal ny. in this case there is no limit for the voltage drop across the switch, but the voltage at pins ny and nz may not exceed v cc or gnd. 10. static characteristics table 6. recommended operating conditions voltages are referenced to gnd (ground = 0 v). [1] symbol parameter conditions 74hc2g66 74hct2g66 unit min typ max min typ max v cc supply voltage 2.0 5.0 10.0 4.5 5.0 5.5 v v i input voltage 0 - v cc 0-v cc v v o output voltage 0 - v cc 0-v cc v v sw switch voltage 0 - v cc 0-v cc v t amb ambient temperature ? 40 +25 +125 ? 40 +25 +125 c t/ v input transition rise and fall rate v cc = 2.0 v - - 625 - - - ns/v v cc = 4.5 v - 1.67 139 - 1.67 139 ns/v v cc = 6.0 v - - 83 - - - ns/v v cc = 10.0 v - - 35 - - - ns/v table 7. static characteristics voltages are referenced to gnd (ground = 0 v). symbol parameter conditions ? 40 c to +85 c ? 40 c to +125 c unit min typ [1] max min max 74hc2g66 v ih high-level input voltage v cc = 2.0 v 1.5 1.2 - 1.5 - v v cc = 4.5 v 3.15 2.4 - 3.15 - v v cc = 6.0 v 4.2 3.2 - 4.2 - v v cc = 9.0 v 6.3 4.7 - 6.3 - v v il low-level input voltage v cc = 2.0 v - 0.8 0.5 - 0.5 v v cc = 4.5 v - 2.1 1.35 - 1.35 v v cc = 6.0 v - 2.8 1.8 - 1.8 v v cc = 9.0 v - 4.3 2.7 - 2.7 v i i input leakage current ne; v i =v cc or gnd v cc =6.0v - - 0.1 - 0.1 a v cc =9.0v - - 0.2 - 0.2 a i s(off) off-state leakage current ny or nz; v cc = 9.0 v; see figure 6 - 0.1 1.0 - 1.0 a i s(on) on-state leakage current ny or nz; v cc = 9.0 v; see figure 7 - 0.1 1.0 - 1.0 a i cc supply current ne, ny and nz = v cc or gnd v cc =6.0v - - 10 - 20 a v cc =9.0v - - 20 - 40 a
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 6 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch [1] typical values are measured at t amb = 25 c. 10.1 test circuits c i input capacitance - 3.5 - - - pf c pd power dissipation capacitance -9- - -pf c s(on) on-state capacitance - 8 - - - pf 74hct2g66 v ih high-level input voltage v cc = 4.5 v to 5.5 v 2.0 1.6 - 2.0 - v v il low-level input voltage v cc = 4.5 v to 5.5 v - 1.2 0.8 - 0.8 v i i input leakage current ne; v i =v cc or gnd; v cc =5.5v - - 1.0 - 1.0 a i s(off) off-state leakage current ny or nz; v cc = 5.5 v; see figure 6 - 0.1 1.0 - 1.0 a i s(on) on-state leakage current ny or nz; v cc = 5.5 v; see figure 7 - 0.1 1.0 - 1.0 a i cc supply current ne, ny and nz = v cc or gnd; v cc = 4.5 v to 5.5 v --10- 20 a i cc additional supply current ne = v cc ? 2.1 v; i o =0a; v cc = 4.5 v to 5.5 v; - - 375 - 410 a c i input capacitance - 3.5 - - - pf c pd power dissipation capacitance -9- - -pf c s(on) on-state capacitance - 8 - - - pf table 7. static characteristics ?continued voltages are referenced to gnd (ground = 0 v). symbol parameter conditions ? 40 c to +85 c ? 40 c to +125 c unit min typ [1] max min max v i = v cc or gnd and v o = gnd or v cc .v i = v cc or gnd and v o = open circuit. fig 6. test circuit for measuring off-state leakage current fig 7. test circuit for measuring on-state leakage current 001aaj46 5 i s i s v i v il v o v cc gnd nz ny ne 001aaj46 6 i s v i v ih v o v cc gnd nz ny ne
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 7 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch 10.2 on resistance [1] at supply voltages approaching 2 v, the on resistance becomes extremely non-linear. therefore it is recommended that these de vices be used to transmit digital signals only, when using this supply voltage. [2] typical values are measured at t amb = 25 c. table 8. on resistance for 74hc2g66 and 74hct2g66 at recommended operating conditions; voltages ar e referenced to gnd (ground 0 v); for graph see figure 9 . symbol parameter conditions ? 40 c to +85 c ? 40 c to +125 c unit min typ [2] max min max 74hc2g66 [1] r on(peak) on resistance (peak) v i =gndtov cc ; see figure 8 and 9 i sw =0.1ma; v cc = 2.0 v - 250 - - - i sw =1.0ma; v cc = 4.5 v - 41 118 - 142 i sw =1.0ma; v cc = 6.0 v - 30 105 - 126 i sw =1.0ma; v cc = 9.0 v - 21 88 - 105 r on(rail) on resistance (rail) v i = gnd; see figure 8 and 9 i sw =0.1ma; v cc =2.0v - 65 - - - i sw =1.0ma; v cc = 4.5 v - 28 95 - 115 i sw =1.0ma; v cc = 6.0 v - 22 82 - 100 i sw =1.0ma; v cc =9.0v - 18 70 - 80 v i =v cc ; see figure 8 and 9 i sw =0.1ma; v cc =2.0v - 65 - - - i sw =1.0ma; v cc = 4.5 v - 31 106 - 128 i sw =1.0ma; v cc = 6.0 v - 23 94 - 113 i sw =1.0ma; v cc =9.0v - 19 78 - 95 r on on resistance mismatch between channels v i =v cc to gnd; see figure 8 and 9 v cc =4.5v - 5 - - - v cc =6.0v - 4 - - - v cc =9.0v - 3 - - - 74hct2g66 r on(peak) on resistance (peak) v i =gndtov cc ; see figure 8 and 9 i sw =1.0ma; v cc = 4.5 v - 41 118 - 142 r on(rail) on resistance (rail) v i = gnd; see figure 8 and 9 i sw =1.0ma; v cc = 4.5 v - 28 95 - 115 v i =v cc ; see figure 8 and 9 i sw =1.0ma; v cc = 4.5 v - 31 106 - 128 r on on resistance mismatch between channels v i =v cc to gnd; see figure 8 and 9 v cc =4.5v - 5 - - -
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 8 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch 10.3 on resistance test circuit and graphs 11. dynamic characteristics r on =v sw / i sw .t amb = 25 c. fig 8. test circuit for measuring on resistance fig 9. typical on resistance as a function of input voltage 001aaj46 7 v i v ih v cc gnd nz ny ne v sw i sw 20 40 60 r on ( ) 0 v i (v) 010 8 46 2 mnb006 v cc = 4.5 v v cc = 6.0 v v cc = 9.0 v table 9. dynamic characteristics voltages are referenced to gnd (ground = 0 v); for test circuit see figure 12 . symbol parameter conditions ? 40 c to +85 c ? 40 c to +125 c unit min typ [1] max min max 74hc2g66 t pd propagation delay ny to nz or nz to ny; r l = ; see figure 10 [2] v cc = 2.0 v - 6.5 65 - 80 ns v cc = 4.5 v - 2 13 - 15 ns v cc = 6.0 v - 1.5 11 - 14 ns v cc = 9.0 v - 1.2 10 - 12 ns t en enable time ne to ny or nz; see figure 11 [2] v cc = 2.0 v - 40 125 - 150 ns v cc = 4.5 v - 12 29 - 30 ns v cc = 6.0 v - 10 21 - 26 ns v cc = 9.0 v - 7 16 - 20 ns t dis disable time ne to ny or nz; see figure 11 [2] v cc = 2.0 v - 21 145 - 175 ns v cc = 4.5 v - 12 29 - 35 ns v cc = 6.0 v - 11 28 - 33 ns v cc = 9.0 v - 10 23 - 27 ns c pd power dissipation capacitance v i =gndtov cc [3] -9- - -pf
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 9 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch [1] all typical values are measured at t amb =25 c. [2] t pd is the same as t plh and t phl . t en is the same as t pzl and t pzh . t dis is the same as t plz and t phz . [3] c pd is used to determine the dynamic power dissipation p d ( w). p d =c pd v cc 2 f i + ((c l c sw ) v cc 2 f o )where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; c sw = maximum switch capacitance in pf (see table 7 ); v cc = supply voltage in volts; ((c l c sw ) v cc 2 f o ) = sum of outputs. 11.1 waveforms and test circuit 74hct2g66 t pd propagation delay ny to nz or nz to ny; r l = ; see figure 10 [2] v cc = 4.5 v - 2 15 - 18 ns t en enable time ne to ny or nz; see figure 11 [2] v cc = 4.5 v - 13 30 - 36 ns t dis disable time ne to ny or nz; see figure 11 [2] v cc = 4.5 v - 13 44 - 53 ns c pd power dissipation capacitance v i =gndtov cc ? 1.5 v [3] -9- - -pf table 9. dynamic characteristics ?continued voltages are referenced to gnd (ground = 0 v); for test circuit see figure 12 . symbol parameter conditions ? 40 c to +85 c ? 40 c to +125 c unit min typ [1] max min max measurement points are given in table 10 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 10. input (ny or nz) to output (nz or ny) propagation delays 001aaa54 1 t plh t phl v m v m v m v m ny or nz input nz or ny output gnd v i v oh v ol
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 10 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch measurement points are given in table 10 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 11. enable and disable times 001aaa54 2 t plz t phz switch disabled switch enabled switch enabled output low-to-off off-to-low output high-to-off off-to-high ne input ny or nz ny or nz v i v ol v oh v cc v m v m v x v y v m gnd gnd t pzl t pzh table 10. measurement points type input output v m v m v x v y 74hc2g66 0.5v cc 0.5v cc v ol + 10 % v oh ? 10 % 74hct2g66 1.3 v 1.3 v v ol + 10 % v oh ? 10 %
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 11 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch [1] there is no constraint on t r , t f with a 50 % duty factor when measuring f max . 11.2 additional dynami c characteristics test data is given in table 11 . definitions for test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance. r l = load resistance. s1 = test selection switch. fig 12. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aad98 3 dut v cc v cc v i v o r t r l s1 c l open g table 11. test data type input load s1 position v i t r , t f [1] c l r l t phl , t plh t pzh , t phz t pzl , t plz 74hc2g66 gnd to v cc 6 ns 50 pf 1 k open gnd v cc 74hct2g66 gnd to 3 v 6 ns 50 pf 1 k open gnd v cc table 12. additional dynamic charact eristics for 74hc2g66 and 74hct2g66 gnd = 0 v; t r = t f = 6.0 ns; c l = 50 pf; unless otherwise specified. al l typical values are measured at t amb =25 c. symbol parameter conditions min typ max unit thd total harmonic distortion f i = 1 khz; r l = 10 k ; see figure 13 % v cc = 4.5 v; v i = 4.0 v (p-p) - 0.04 - % v cc = 9.0 v; v i = 8.0 v (p-p) - 0.02 - % f i =10khz; r l = 10 k ; see figure 13 v cc = 4.5 v; v i = 4.0 v (p-p) - 0.12 - % v cc = 9.0 v; v i = 8.0 v (p-p) - 0.06 - %
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 12 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch 11.3 test circuits and graphs f ( ? 3db) ? 3 db frequency response r l = 50 ; c l =10pf; see figure 14 and 15 v cc = 4.5 v - 180 - mhz v cc = 9.0 v - 200 - mhz iso isolation (off-state) r l = 600 ; f i =1mhz; see figure 16 and 17 v cc = 4.5 v - ? 50 - db v cc = 9.0 v - ? 50 - db v ct crosstalk voltage between digital input and switch (peak to peak value); r l =600 ; f i = 1 mhz; see figure 18 v cc = 4.5 v - 110 - mv v cc = 9.0 v - 220 - mv xtalk crosstalk between switches; r l =600 ; f i = 1 mhz; see figure 19 v cc = 4.5 v - ? 60 - db v cc = 9.0 v - ? 60 - db table 12. additional dynamic charact eristics for 74hc2g66 and 74hct2g66 ?continued gnd = 0 v; t r = t f = 6.0 ns; c l = 50 pf; unless otherwise specified. al l typical values are measured at t amb =25 c. symbol parameter conditions min typ max unit with f i = 1 mhz adjust the switch input voltage for a 0 dbm level at the switch output, (0 dbm = 1 mw into 50 ). then increase the input frequency until the db meter reads ? 3db. fig 13. test circuit for measuring total harmonic distortion fig 14. test circuit for measuring the ? 3 db frequency response 10 f 2r l 2r l c l f i v ih v o v cc v cc ne d ny/nz nz/ny 001aaj46 8 0.1 f 2r l 2r l c l f i v ih v o v cc v cc ne db ny/nz nz/ny 001aaj46 9
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 13 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch test conditions: v cc = 4.5 v; gnd = 0 v; r l =50 ;r source =1k . fig 15. typical ? 3 db frequency response mna083 5 (db) ? 5 10 f i (khz) 10 5 10 6 10 4 10 2 10 3 0 adjust the switch input voltage for a 0 dbm level (0 dbm = 1 mw into 600 ) fig 16. test circuit for measuring isolation (off-state) 0.1 f 2r l 2r l c l f i v il v o v cc v cc ne db ny/nz nz/ny 001aaj47 0
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 14 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch test conditions: v cc = 4.5 v; gnd = 0 v; r l =50 ;r source =1k . fig 17. typical isolation (off-state) as a function of frequency mna082 ? 60 ? 40 ? 80 ? 20 0 (db) ? 100 10 f i (khz) 10 5 10 6 10 4 10 2 10 3 a. circuit b. crosstalk voltage adjust the switch input voltage for a 0 dbm level (0 dbm = 1 mw into 600 ) fig 18. test circuit for measuring crosstalk volt age (between the digital input and the switch) dut mnb01 1 2r l 2r l 2r l 2r l nz/ny ny/nz c l oscilloscope v cc ne v cc v cc gnd gnd mnb012 v(p ? p)
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 15 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch adjust the switch input voltage for a 0 dbm level (0 dbm = 1 mw into 600 ) fig 19. test circuit for measuring crosstalk (between the switches) 001aai84 6 v ih v cc 1z or 1y 1y or 1z channel on 1e f i 2r l r l 0.1 f c l v v il v cc v cc 2z or 2y 2y or 2z channel off 2e 2r l 2r l 2r l 2r l 2r l c l v v o1 v o2
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 16 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch 12. package outline fig 20. package outline sot505-2 (tssop8) unit a 1 a max. a 2 a 3 b p l h e l p wy v ce d (1) e (1) z (1) references outline version european projection issue date iec jedec jeita mm 0.15 0.00 0.95 0.75 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.70 0.35 8 0 0.13 0.1 0.2 0.5 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 0.47 0.33 sot505-2 - - - 02-01-16 w m b p d z e 0.25 14 8 5 a 2 a 1 l p (a 3 ) detail x a l h e e c v m a x a y 2.5 5 mm 0 scale tssop8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505- 2 1.1 pin 1 index
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 17 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch fig 21. package outline sot765-1 (vssop8) unit a 1 a max. a 2 a 3 b p l h e l p wy v ce d (1) e (2) z (1) references outline version european projection issue date iec jedec jeita mm 0.15 0.00 0.85 0.60 0.27 0.17 0.23 0.08 2.1 1.9 2.4 2.2 0.5 3.2 3.0 0.4 0.1 8 0 0.13 0.1 0.2 0.4 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.40 0.15 q 0.21 0.19 sot765-1 mo-187 02-06-07 w m b p d z e 0.12 14 8 5 a 2 a 1 q l p (a 3 ) detail x a l h e e c v m a x a y 2.5 5 mm 0 scale vssop8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765- 1 1 pin 1 index
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 18 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch fig 22. package outline sot833-1 (xson8) terminal 1 index area references outline version european projection issue date iec jedec jeita sot833-1 - - - mo-252 - - - sot833- 1 07-11-14 07-12-07 dimensions (mm are the original dimensions) xson8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 e 1 0 1 2 mm scale notes 1. including plating thickness. 2. can be visible in some manufacturing processes. unit mm 0.25 0.17 2.0 1.9 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.5 0.6 a (1) max 0.5 0.04 1 8 2 7 3 6 4 5 8 (2) 4 (2) a
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 19 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch fig 23. package outline sot996-2 (xson8u) references outline version european projection issue date iec jedec jeita sot996-2 - - - - - - sot996- 2 07-12-18 07-12-21 unit a max mm 0.5 0.05 0.00 0.35 0.15 3.1 2.9 0.5 1.5 0.5 0.3 0.6 0.4 0.1 0.05 a 1 dimensions (mm are the original dimensions) x son8u: plastic extremely thin small outline package; no leads; 8 terminals; utlp based; body 3 x 2 x 0.5 mm 0 1 2 mm scale b d 2.1 1.9 e e e 1 l l 1 0.15 0.05 l 2 v w 0.05 y y 1 0.1 c y c y 1 x b 14 85 e 1 e a c b v m c w m l 2 l 1 l terminal 1 index area b a d e detail x a a 1
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 20 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch 13. abbreviations 14. revision history table 13. abbreviations acronym description cmos complementary metal-oxide semiconductor esd electrostatic discharge hbm human body model mm machine model dut device under test table 14. revision history document id release date data sheet status change notice supersedes 74hc_hct2g66 v.8 20100923 product data sheet - 74hc_hct2g66 v.7 modifications: ? figure 4 : pin configuration drawing centered. 74hc_hct2g66 v.7 20100914 product data sheet - 74hc_hct2g66 v.6 modifications: ? added type number 74hc2g66gt and 74HCT2G66GT (xson8 package) 74hc_hct2g66 v.6 20100402 product data sheet - 74hc_hct2g66 v.5 74hc_hct2g66 v.5 20090126 product data sheet - 74hc_hct2g66 v.4 74hc_hct2g66 v.4 20040519 product specification - 74hc_hct2g66 v.3 74hc_hct2g66 v.3 20031126 product specification - 74hc_hct2g66 v.2 74hc_hct2g66 v.2 20030808 product specification - 74hc_hct2g66 v.1 74hc_hct2g66 v.1 20030625 pr oduct specification - -
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 21 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 15.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 15.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interrupt ion, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qua lified for use in automotive applications. the product is not desi gned, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be ex pected to result in personal injury, death or severe property or environmental dam age. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this docu ment contains the product specification.
74hc_hct2g66 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 8 ? 23 september 2010 22 of 23 nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from national authorities. 15.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74hc2g66; 74hct2g66 dual single-pole singl e-throw analog switch ? nxp b.v. 2010. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 23 september 2010 document identifier: 74hc_hct2g66 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 4 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 9 recommended operating conditions. . . . . . . . 5 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 10.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10.2 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 7 10.3 on resistance test circuit and graphs. . . . . . . . 8 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 8 11.1 waveforms and test circuit . . . . . . . . . . . . . . . . 9 11.2 additional dynamic characteristics . . . . . . . . . 11 11.3 test circuits and graphs . . . . . . . . . . . . . . . . . 12 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 20 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 20 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 21 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 21 15.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 15.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22 16 contact information. . . . . . . . . . . . . . . . . . . . . 22 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

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